Multi-Level Cell (MLC)

A multi-level cell (MLC) is a memory cell capable of storing more than a single bit of information, compared to a single-level cell (SLC), which can store only one bit per memory cell. A memory cell typically consists of a single floating-gate MOSFET (metal-oxide-semiconductor field-effect transistor), thus multi-level cells reduce the number of MOSFETs required to store the same amount of data as single-level cells.

In this topic, we will talk about multi-level cells. The multi-level cell is a type of NAND flash memory that can store more than 1 bit per cell of data. NAND Flash is a form of non-volatile memory that allows data to be stored without power.

Triple-level cells (TLC) and quad-level cells (QLC) are versions of MLC memory, which can store three and four bits per cell respectively. The name “multi-level cell” is sometimes used specifically to refer to the “two-level cell”. Overall, the memories are named as follows:

1. Single-level cell or SLC (1 bit per cell)
2. Multi-level cell or MLC (2 bits per cell), alternatively double-level cell or DLC
3. Triple-level cell or TLC (3 bits per cell) or 3-Bit MLC
4. Quad-level cell or QLC (4 bits per cell)
5. Penta-level cell or PLC (5 bits per cell) – currently in development

Notice that this nomenclature can be misleading since an “n-level cell” in fact uses 2ⁿ levels of charge to store n bits (see below). Typically, as the “level” count increases, performance (speed and reliability) and consumer cost decrease; however, this correlation can vary between manufacturers.

Examples of MLC memories are MLC NAND flash, MLC PCM (phase-change memory), etc. For example, in SLC NAND flash technology, each cell can exist in one of the two states, storing one bit of information per cell. Most MLC NAND flash memory has four possible states per cell, so it can store two bits of information per cell. This reduces the amount of margin separating the states and results in the possibility of more errors. Multi-level cells that are designed for low error rates are sometimes called enterprise MLC (eMLC).

New technologies, such as multi-level cells and 3D Flash, and increased production volumes will continue to bring prices down.^[rx]

Difference between Enterprise Multi-Level Cell and Consumer Multi-Level Cell?

Multi-level cell flash is a center point between single-level cell flash and triple-level cell. NAND flash possesses a finite amount of writing cycles. Since multi-level cell flash is typically less costly than Single-Level Cell flash, it is the preferred solid-state storage memory of consumer-based electronic device makers.

Enterprise multi-level cell drives are designed to handle a greater number of writing cycles with an improved form of multi-level cell flash. Various methods are used to allow the use of eMLC to design inexpensive solid-state drives for enterprises. Algorithms to enhance the unrecoverable bit error rate, flash overprovisioning, wear leveling, and amplification of writing are included in these methods.

How multi-level cell flash compares to single-level cell flash?

One disadvantage of multi-level cell flash is its higher bit rate in comparison with NAND flash memory and a single-level cell. The more bits a cell contains the fewer write cycles it can handle, and the greater the possibility of errors. Single-level cell flash uses NAND memory of best quality, storing 1 bit per cell but always in one of two voltage states programmed, denoted as 0 and 1. Having only two states means that in single-level cell flash allows for fast data analysis and decreases the bit error rate. Since SLC flash stores fewer data bits per cell, however, it is typically considered a more expensive form of storage memory than multi-level cell flash

The ability to multiply multi-level cell flash voltage states decreases manufacturing costs and has increased the use of technology in mobile phones, cameras, and USB flash drives. Usually, MLC flash memory cards have a slower transfer speed and use more power. A multi-level cell is divided into four states, defined by the cell’s degree of electrical charge. The MLC has two levels, the MLC-3 has eight, and the MLC-4 has 16.

Allowing multiple electrical states can also lead to higher error rates with multi-level flash cells. When a NAND flash cell exceeds its write limit, it will begin to malfunction which can corrupt data. To make this, vendors tried to solve the issue by developing smarter flash controllers.

Triple-level cell: Successor to consumer flash?

Triple-level flash cells drive NAND flash boundaries. As the title implies, the triple-level NAND cell holds 3 bits of data per flash drive. NAND triple-level cell makes use of developments in geometries of the semiconductor process to give higher densities than planar NAND.

The disadvantage of the triple-level cell flash emerges from the higher error correction required to decode the signal crosstalk resulting from more bits per cell being processed. Triple-level cell SSDs have only made limited appearances as enterprise flash technology to support high-volume reads.

Flash vendors push boundaries of 3D NAND Technology

Leading flash vendors are breaking the multi-level cell flash limits. The 3D NAND flash memory is a newer flash chip design architecture. Manufacturers stack several layers of memory cells into a vertical structure in 3D NAND. The stacking approach eliminates the electrical interference that occurs while shrinking the cell sizes. Leading 3D NAND flash producers include Intel Corp. Samsung Hynix, SK, and Western Multimedia Corp., a companion to Toshiba. The future of the Toshiba-Western Digital relationship is uncertain due to a conflict with Western Digital affiliate SanDisk, which contesting Toshiba’s proposed sale to a coalition of Apple Corp., Dell Technologies Resources, Kingston Technology Corp, and Seagate innovations. Based on a 64-layer 3D NAND system architecture, Samsung has disclosed a preliminary design for quad-level cell flash.